A grid-forming converter (GFC) establishes a stable and controllable voltage at its output terminal without requiring external angle reference, which enables the GFC to be a candidate for providing black start services. The inherent voltage and frequency regulation attributes of GFC pose significant challenges to the conventional power hardware-in-the-loop (PHIL) simulation, which incorporates the physical power converter by regulating its voltage angle to be synchronized with that of an interfacing power amplifier mimicking the real-time emulated power grid.

The lack of voltage angular synchronization at the coupling point between the GFC and the interfacing power amplifier leads to instability. In addition, the robust operation of the PHIL closed-loop setup is susceptible to system dynamics (e.g., time delays, system impedance ratio, noise), which give rise to concerns related to stability and accuracy. Furthermore, the limited power capability of the candidate GFC, coupled with the interfacing power amplifier imposing rigorous voltage and current constraints for protection purposes in a laboratory environment, restrict the applicability of PHIL for high-power testing of GFC

Objectives

This JRA project aims to address the limitations of the existing PHIL interfacing method, which has stability and accuracy issues due to the lack of voltage angular synchronization at the coupling point between the GFC and the interfacing power amplifier and to bridge the research gap stemming from the lack of a streamlined, optimized interface tailored specifically for PHIL testing of GFC.

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To analyse and evaluate the interfacing algorithms to determine their feasibility and capability of interfacing the GFC with soft black start capability in the PHIL setup.
Isgan_v1
To develop interfacing compensation schemes that encompass optimized scaling, delay compensation, and stabilization methods. These schemes should improve the stability and accuracy of the candidate interfaces and mitigate the impact of time delays and limited power converter capabilities on grid-forming control performance.
Isgan_v1
To conduct analytical assessment and simulation-based verification of PHIL setups utilizing various interfaces, in conjunction with the proposed compensation schemes and emulated GFC.
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To perform experimental validation involving PHIL setups with optimized interfaces and physical power converters implemented with grid forming control to verify the performance of the feasible interfaces along with the proposed compensation schemes.

Publications

  1. Alassi, Z. Feng, K. Ahmed, M. Syed, Agusti Egea-Alvarez and C. Foote, “Grid-forming VSM control for black-start applications with experimental PHiL validation,” International Journal of Electrical Power & Energy Systems, vol. 151, p. 109119, 2023. https://doi.org/10.1016/j.ijepes.2023.109119
  2. Bründlinger, R., T. Strasser, G. Lauss, A. Hoke, S. Chakraborty, G. Martin, B. Kroposki, J. Johnson and E. de Jong, “Lab Tests: Verifying That Smart Grid Power Converters Are Truly Smart,” IEEE Power and Energy Magazine, vol. 13, no. 2, pp. 30–42, 2015. https://doi.org/10.1109/MPE.2014.2379935
  3. Erckrath, C. Bendfeld, R. Brandl and M. Jung, “Power Hardware-in-the-Loop Validation of Grid-Forming Control and Current Limitation for Start up of Induction Motors in Microgrids,” in 25th European Conference on Power Electronics and Applications (EPE’23 ECCE Europe), Aalborg, Denmark, 2023. https://doi.org/10.23919/EPE23ECCEEurope58414.2023.10264509
  4. Feng, A. Alassi, M. Syed, R. Pena-Alzola, K. Ahmed and G. Burt, “Current-Type Power Hardware-in-the-Loop Interface for Black-Start Testing of Grid-Forming Converter,” in IECON 2022 – 48th Annual Conference of the IEEE Industrial Electronics Society, Brussels, 2022. Link
  5. Hernandez-Alvidrez, N. S. Gurule, M. J. Reno, J. D. Flicker, A. Summers and A. Ellis, “Method to Interface Grid-Forming Inverters into Power Hardware in the Loop Setups,” in 2020 47th IEEE Photovoltaic Specialists Conference (PVSC), 2020. https//doi.org/10.1109/PVSC45281.2020.9300804
  6. Kikusato, T. S. Ustun, J. Hashimoto, K. Otani, T. Nagakura, R. M. Y. Yoshioka and K. Mori, “Developing Power Hardware-in-the-Loop Based Testing Environment for Volt-Var and Frequency-Watt Functions of 500kw Photovoltaic Smart Inverter,” IEEE Access, vol. 8, pp. 224135-224144, 2020. https://doi.org/10.1109/ACCESS.2020.3044327
  7. Johnson, J., B. Fox, R. Ablinger, R. Bründlinger and J. Flicker, “Design and Evaluation of SunSpec-Compliant Smart Grid Controller with an Automated Hardware-in-the-Loop Testbed,” in India Smart Grid Week, 2017. Link
  8. Lundstrom, B., S. Chakraborty, G. Lauss, R. Bründlinger and R. Conklin, “Evaluation of system-integrated smart grid devices using software- and hardware-in-the-loop,” in IEEE Conference on Innovative Smart Grid Technologies (ISGT), 2016. https://doi.org/10.1109/ISGT.2016.7781181
  9. Montoya, J., et al., “Advanced Laboratory Testing Methods Using Real-Time Simulation and Hardware-in-the-Loop techniques: A Survey of Smart Grid International Research Facility Network Activities,” Energies (MDPI), 2020. Link
  10. Nuschke, M., R. Brandl, J. Montoya and D. Strauss-Mincu, “Towards Holistic Testing: Development of a Microgrid Controller,” in Symposium on Microgrids, 2017. https://doi.org/10.13140/RG.2.2.14157.08163

Participants

Canada

Hydro-Québec Research Institute (IREQ), Natural Resources Canada (NRCan)

Denmark

Technical University of Denmark (DTU)

Germany

DERlab, Fraunhofer IEE

Japan

National Institute of Advanced Industrial Science and Technology (AIST)

United Kingdom

University of Strathclyde, WSP

United States of America

Sandia Lab

Contact

Zhiwang Feng

University of Strathclyde
Email

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