JRA: GFm testing

​​Development of PHIL Interfacing Methods to Facilitate Black-Start Testing of Grid-Forming Converters ​

Project summary

Grid-forming converter (GFC) establishes a stable and controllable voltage at its output terminal without requiring external angle reference, which enables the GFC to be a candidate for providing black start services. The inherent voltage and frequency regulation attributes of GFC pose significant challenges to the conventional power hardware-in-the-loop (PHIL) simulation, which incorporates the physical power converter by regulating its voltage angle to be synchronized with that of an interfacing power amplifier mimicking the real-time emulated power grid. The lack of voltage angular synchronization at the coupling point between the GFC and the interfacing power amplifier leads to instability. In addition, the robust operation of the PHIL closed-loop setup is susceptible to system dynamics (e.g., time delays, system impedance ratio, noise), which give rise to concerns related to stability and accuracy. Furthermore, the limited power capability of the candidate GFC, coupled with the interfacing power amplifier imposing rigorous voltage and current constraints for protection purposes in a laboratory environment, restrict the applicability of PHIL for highpower testing of GFC.   

Objectives of the project:

To address the limitations of the existing PHIL interfacing method regarding the stability and accuracy issues arising from the lack of lack of voltage angular synchronization at the coupling point between GFC and the interfacing power amplifier, and to bridge the research gap stemming from the lack of streamlined and optimized interface tailored specifically for PHIL testing of GFC, this collaborative Joint Research Activity (JRA) project encompasses the following objectives: 

  • In-depth analysis and comprehensive evaluation of the interfacing algorithms regarding their feasibility and capability for interfacing the GFC with soft black start capability into PHIL setup.  
  • Develop interfacing compensation schemes encompassing optimized scaling, delay compensation, and stabilization methods, to improve the stability and accuracy of the candidate interfaces and to mitigate the impact of the time delay and the limited capability of power converters on the grid forming control performance.  
  • Conduct analytical assessment and simulation-based verification of PHIL setups utilizing various interfaces, in conjunction with the proposed compensation schemes and emulated GFC.  
  • Perform experimental validation involving PHIL setups with optimized interfaces and physical power converters implemented with grid forming control to verify the performance of the feasible interfaces along with the proposed compensation schemes. 

JRA leader


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